Durgesh Addala

Durgesh Addala - Research scholar VIJAYAWADA, INDIA I am enthusiastic and driven post-graduation in VLSI Design from the Lovely Professional University. I am currently looking to secure a Job related to my field. 18 December, 1996 linkedin.com/in/durgesh-addala-35b104197 twitter.com/addala_durgesh quora.com/profile/Durgesh-Addala ACADEMIC QUALIFICATIONS TECHNICAL SKILLS M.tech(VLSI Design) lovely Professional University 07/2019 - Present, Cadence- Virtuoso 8.23/10 CGPA B.tech(Electronics & Communication Engineering) Amrita sai institute of science and technology 06/2015 - 05/2019, 72.4% 92.9% X Ravindra Bharathi Public School 05/2012 - 05/2013, FPGA Verilog computing & peripherals WORKSHOPS Participated in "Workshop on Ethical Hacking" organized by ROBOSAGA in IIT Madras. (01/2018) Intermediate(M P C) Narayana junior college 05/2013 - 06/2015, xilinx -vivado Arduino 9.0 GPA Participated in "workshop on Mobile Robotics" organized by ROBOSAGA in IIT Madras (01/2018) ACHIEVEMENTS /CERTIFICATES The Embedded Systems Training course from purple techno solutions (11/2018) PROJECT OBJECT TRACKING AND FOLLOWING ROBO (2019) To identify and tracking the real-time object is an important concept in computer vision. In order to detect the object first take the necessary and relevant step to gather information form the many computer vision applications. In this project, robots can detect the object and rotate as left and right position and then move forward and backward depends upon the object movement. It maintains the constant distance between the object and the robot. In the hardware setup, they use the arm 11 raspberry pi camera to attach the robot for the detection of the object. The camera is attached to the servos for pan and tilt.use Linux OS with python coding to identify the object. Design and implementation of 1T DRAM cell using FD-SOI Technology-) FD-SOI FET considers as low power with very high-speed performance device when compared with bulk technologies FD-SOI FET has lots of advantages thanks to the thickness, Buried Oxide (BOX) layers helps to protect from leakage power, thanks to the structure with low leakage power this helps to boost the researchers to focus on FD-SOI FET. Nowadays people interested in portable and low power devices. Subthreshold swing makes an important role in making low power devices for low power devices Subthreshold Swing must be low, In FD-SOI the Subthreshold swing value range between 65-80. The present trend needs devices with low cost, low power, and lower thermal resistance. For these kinds of applications, FD-SOI technology is more efficient. DRAM can be implemented by FDSOI for better performance results. SUMMER INTERNSHIP successfully cleared the assessment for Installation Technician (Computing & Peripherals) organized by National Skill Development Corporation (05/2016) awarded with second prize for the paper presentation in a national level technical symposium at amrita sai institute of science and technology (03/2015) 3rd International Conference on Intelligent Circuits and Systems (06/2020) the paper got accepted and Presented Paper: Fault Simulation Algorithm for Transistor Single Stuck Short Faults at lovely professional university. Design of Low‐Power DRAM Cell Using Advanced FET Architectures(chapter) (03/2021) This chapter includes the design and analysis of Dynamic Random‐ Access Memory (DRAM) cells with a focus on the comparison of the different technologies such as Carbon‐Nano‐tube FET (CNTFET), FinFET and TFET that are suitable for low‐power, high‐performance memory design. https://doi.org/10.1002/-.ch7 LANGUAGES English Over Hauling on wheel Assemble Wagon Workshop, Guntupalli. 06/2018, Telugu Hindi