Mike Taylor

Michael D. Taylor - Pacific Northwest - Summary of Qualifications • Self-motivated engineer with significant experience in embedded design, testing, problem analysis and resolution, and project coordination. • 32 years experience in a competitive product development environment delivering embedded microprocessor systems, emulation and software analysis tools and medical devices. • Proven leadership and team-building skills, successfully leading small engineering teams in all phases of product development from concept to customer delivery. Areas of Experience Embedded System Design High Speed Digital Design DDR/DDR2 Memory Design Firmware Development Maintenance of C, C++ Code Base High speed Processor Interface Analog/Mixed Signal Design System Architecture Development Cadence CAD Tools, OrCAD High Density FPGA Design, VHDL USB, PCI Express, Xilinx Aurora Project/Resource Management PCB Layout Education and Credentials Bachelor of Science in Electrical Engineering with a Computer Engineering option W ASHINGTON STATE UNIVERSITY – Pullman, Washington Professional Associations: NEXUS 5001 TECHNICAL COMMITTEE, POWER.ORG TECHNICAL COMMITTEE Professional Experience Consulting Engineer Contract Positions, Taylor’d Engineering LLC 03/2010 – Present Part time contract M||rror House 02/2018 – Present Hardware and schematic development of smart lighting products. • • • • System architecture development, component selection, and hardware design. OrCAD schematic creation and layout support. ARM based system with Bluetooth and USB Type C Lithium-ion battery charging capability. Reviewed early design and implemented design changes for cost savings, performance improvements. Part time to Full time contract Orflo Technologies 06/2010 – 10/2017 Hardware development and support of complete line of cell counters and flow cytometers. • • • • System architecture development, analog and digital design. Developed low noise, constant current laser drive circuitry. OrCAD schematic creation, layout support, and prototype and production manufacturing support. AVR based hardware and software development of calibration/test cassette. Part time contract Cardiac Insight 11/2011 – 11/2015 • Hardware development, design, and support of Stealth Prime wearable ECG monitor. • OrCAD schematic creation, layout support, and prototype manufacturing support. • Verification testing, performance validation, FDA certification support, and release protocols and reports. Full time contract Freescale Semiconductor 03/2010 – 03/2011 • Continued development and support of the Nexus High Speed Serial Trace/JTAG debug tool. • Worked closely with Xilinx to identify and fix and/or workaround issues with high speed serial Aurora core. Michael D. Taylor - Pacific Northwest - Full Time Direct Positions Senior Embedded Design Engineer, Freescale Semiconductor 01/2006 – 02/2010 • Project lead, system architect, and hardware engineer on next generation Nexus High Speed Serial Trace/JTAG debug tool, responsible for hardware feature definition and integration of hardware, firmware, and host software as well as interfacing with internal ‘customers’. • Design of PCI Express and Xilinx Aurora buses, DDR2 memory design and implementation, design and integration of VHDL FPGA IP cores, and silicon verification of trace and debug modules in new processors. • Active member of the NEXUS and Power.Org debug technical committees task with definition and specification of future silicon debug interfaces and target connection strategies. Senior Embedded Design Engineer, Metrowerks/Motorola 11/2001 – 12/2005 Lead hardware engineer for CodeTEST Software Analysis Products for software coverage, test, and verification. • System architect, technical lead, and hardware designer for next generation CodeTEST hardware platform. • Responsible for design and development for hardware connection strategies and investigation and resolution of customer run-in-target, manufacturing, and test issues for the CodeTEST Software Analysis Products. Firmware Engineer, Applied Microsystems 10/1999 – 10/2001 Responsible for implementation of new and enhanced firmware features and bug fixes on Motorola and IBM PowerPC emulators and JTAG tools. Senior Design Engineer, Applied Microsystems 02/1996 – 09/1999 Responsible for system architecture, hardware design, and leading design teams to develop next generation products and revitalizing existing product families. • Designed WindowsCE development system and tools, working closely with software team to integrate software. • Instrumental in bringing chassis emulator functionality into a portable, handheld emulation tools with the development of the SuperTAP 486 project and CodeTAP 80960HX emulators. • Collaborated with silicon and mutli-chip module vendors on technical and economic feasibility studies while investigating the use of high die count multi-chip modules in the emulation of high speed processors. Staff Design Engineer, Applied Microsystems 10/1993 – 01/1996 Hardware engineer responsible for design of 80C186 chassis-based emulator and functional blocks for 80960HX/JX emulator, including 68340 based controller, Xilinx FPGA high speed interfaces, overlay memory, hardware execution breakpoint sub-system, and integration of multiple schematics for packaging and presentation to CAD. Sustaining Engineer, Applied Microsystems 07/1990 – 09/1993 Hardware engineer responsible for investigation and resolution of customer run-in-target, manufacturing, and test issues, and product redesign for cost reduction and feature enhancement. Design Engineer, Boeing Aerospace and Electronics 03/1985 – 06/1990 Design of Boeing 777 Cabin Management System central control unit, Dolby Noise Reduction circuitry for aircraft entertainment system, quad modular RISC based Integrated Avionics Computer, and fault recording module for Onboard Maintenance and Fault Tracking System.