John Bagshaw

I am a highly skilled SoC/FPGA Systems Engineer with over 6 years of experience in ASIC/FPGA design. My expertise lies in digital signal processing for various applications including 5G, GNSS, AI/ML, wireless communication, and medical diagnostics. I excel in delivering low-power, high-reliability solutions that meet industry standards. I have a proven track record of leading projects from inception to deployment, particularly specializing in Xilinx/AMD FPGA development.

In my current role as a Hardware/Software Design Team Lead at York University, I have successfully modified existing software to reduce errors by 20% and ensured seamless adaptation to upgraded interfaces, resulting in minimal downtime. Additionally, I have monitored team productivity and provided constructive feedback to boost output by 15%, all while maintaining stringent quality standards. By implementing streamlined processes, I have reduced operational inefficiencies by 30% and improved overall workflow dynamics.

I am proficient in Verilog, C++, Python, and HLS, and have extensive experience in complex FPGA designs. My projects span various industries including earth observation, medical diagnostics, and traffic control systems. I have led FPGA projects for GPS receivers and DSP modules, consistently achieving on-time deployment and exceeding performance targets through meticulous planning and execution.

Furthermore, I have a strong academic background with a Master of Science in Computer and Systems Engineering from Tallinn University of Technology, and a Bachelor of Engineering in Electronics and Communication Engineering from All Nations University. I have also completed various certifications and received awards for my contributions to the field.

Overall, I am committed to driving innovation in electronics engineering, hardware design, and software development, and am ready to spearhead transformative projects while providing cross-functional leadership.