George Gordon (MSc, P. Eng)
https://www.linkedin.com/in/george-gordon-msc-p-eng-/
Principal FPGA & HW Design Engineer with over 25 years in R&D. As a team player and team lead, I have gained a valuable experience especially in Digital Signal Processing and hardware implementation of complicated MATLAB based algorithms as well as an extensive knowledge in designing complex FPGAs using VHDL, logic & timing simulations, verification & testing, and writing documentation. During my career progression from FPGA and board design engineer to hardware development team lead and later EE team manager, I have developed the ability to manage projects from conception to completion, through design, manufacturing, integration and handover to operational management. Continued professional development has been maintained through appropriate management and professional training courses.
Professional Experience and Accomplishments
Principal Engineer, ATX Networks Jan 2023-present
• Developing architecture and FPGA designs for broadband access products
Senior Electrical Engineer, FPGA Lead, MDA -
• Developing FPGA devices: RTL coding (VHDL, Verilog), simulations (ModelSim), and synthesis for Microchip (Polar Fire) and Xilinx (Ultrascale Plus) devices.
• Developing architecture and designs with Microchip Polar Fire FPGA softcore processor (32-bit RISC-V) and hardcore processor SoC (64-bit 5x core RISC-V), also with Xilinx hardcore processor (Zynq)
• Implementation of Signal and Image Processing algorithms in Firmware (FPGAs)
• EtherCAT controller technology implementation on Polar Fire FPGA for open real-time Ethernet network
• Firmware designs Verification and Validation at unit and System level
Senior FPGA Developer, General Electric 2020
• Designing, testing, and bring up HDLC PCIe card based on Xilinx (Artix-7) PCIe v3.0 IP core for MF Gateway system
Manager of Electrical Engineering, FujiFilm VisualSonics -
• Supervised the team of 5 engineers to deliver high quality product on time
• Managed new project- hiring, budgeting and worked with vendors
• Led system architecture design, top level system planning, scheduling, subsystem and block level specifications
• Maintained and reviewed design details and controlled development progress
• Developed Ultrasound System Power Supply controlling on Intel (Altera) FPGA MAX devices
• Created User Interface application for Ultrasound System Power Supply
Senior FPGA Engineer, Imagine Communications 2017
• Video/Audio data processing design that includes tens of 16 GB transceivers (fast PHY links between high-end Xilinx FPGA devices – Kintex Ultrascale and Virtex Ultrascale Plus) for ST2110 IP HD/UHD 100 Gb Network Processor.
Senior Hardware and FPGA Engineer, Siemens/RuggedCom 2011 – 2016
• Led HW and made PRP Line Module board development for US NAVY rugged communication systems
• Developed digital high-speed Ethernet switch designs (which contained MPC8308 CPU, Altera’s Cyclone-V FPGA, 1GHz SGMII Fiber links).
• Performed RTL coding, simulation and synthesis for Xilinx devices (Spartan-3A, Spartan-6, Kintex-7) for different Ethernet Switch products
• Designed Microblaze System on Chip (SoC) design on Spartan-6 Xilinx FPGA.
• Implemented Parallel Redundancy (PRP), High-availability Seamless Redundancy (HSR) and Precision Time (IEEE 1588v2) protocols in FPGA Ethernet Switch Data link Layer (ESDLL).
• Developed and integrated electronic boards with schematic tools CR5000 (Zuken), ORCAD (Cadence).
• Carried out power management for electronic cards (DC/DC, regulators, etc.)
Hardware Development Team Manager, ELTA/IAI -
• Led System development of both digital and analog units for EW systems.
• Managed R&D group (Board Design, Algorithms, Software RT Embedded and Integration).
• Performed RTL coding (VHDL), simulation and synthesis for Xilinx devices (Virtex-5, Virtex-6, Spartan-6) and Altera devices (Stratix-4, Cyclone-2, Cyclone-4).
• Carried out the process and manufacturing management.
• Developed High-Speed Logic digital hardware based on internal FPGA SERDES and IP cores (Serial FFTs, DFT, DSP blocks and digital FIR filters).
• Implemented various DSP and RT Image Processing algorithms in hardware
Senior Hardware Engineer / DSP Designer, ELTA/IAI 2004 – 2007
• Designed and integrated various electronic cards (micro-systems).
• Performed RTL coding, simulation and synthesis for Xilinx devices (Virtex-2, Virtex-4).
• Developed power management for electronic cards (DC/DC, regulators, etc.).
• Implemented complex DSP algorithms in hardware by using state of the art parallel FFTs as well as digital poly-phase filters with Up and Down converters.
• Prepared electronic concepts for Board and Chip Design.
Hardware / FPGA Engineer ELTA/IAI 2000 – 2004
• Developed FPGA devices: performed RTL coding (VHDL), simulation (ModelSim) and synthesis for Altera devices (MAX, Flex, APEX, Stratix) and Xilinx devices (Virtex-E, Virtex-2).
• Designed interface with A/D, D/A converters and large memories.
• Performed the Board designing and wrote detailed PCB editing instructions and design specifications.
• Implemented verification and debugging of hardware.
Technical skills
FPGA programming:
• Programming Languages: VHDL, Verilog.
• Experience with numerous Xilinx and Altera devices.
• RTL Design and Integration: HDL Designer, Active-HDL, Xilinx Foundation.
• Timing analysis and constraint definitions to meet timing requirements.
• Synthesis: Mentor Graphic (Precision, Leonardo), Simplicity, Xilinx XST, Altera’s Quartus II integrated synthesis.
• Analyzing and Optimizing the Design Floorplan: PlanAhead, FPGA Editor (Xilinx), Chip Planner (Altera).
• Boundary Scan FPGA Analyzers: Chip Scope ILA (Xilinx), Signal Tap (Altera).
• Simulation: ModelSim (Mentor Graphics), Vivado (Xilinx), Aldec.
• EDA: Xilinx’s Vivado and ISE, Altera’s Maxplus-II and Quartus-II.
• EDK: Microblaze, Nios II.
DSP Algorithms HW implementation:
• Algorithm Hardware Implementation (by unique method of real time hardware algorithm realization in hardware).
• HW/Algorithm Co-Design Environment: MATLAB, Modelsim, Labview (National Instruments).
• Model-Based Designing: MATLAB, SIMULINK.
• Programming languages: C, C++, Python
• Digital Signal Processing development tools: Xilinx System Generator, Altera DSP Builder.
Hardware development:
• Board developing and integration: Orcad (Cadence), Design Architect and PCB Layout (Mentor Graphics),
• CR5000/CR8000 (Zuken).
• Signal Integrity for High Speed Design.
• Wide range of Digital to Analog converters (DACs) and Analog to Digital converters (ADCs).
• Memory Components: SRAM, SDRAM, Flash (SPI, BPI), EEPROM.
• High Speed Logic: > 10GHz (INFI, Hittite, ON Semi).
• Power Management: DC/DC, Regulators (Linear, TI, National, etc.).
• Computer bus standards: VME, ISA.
• Serial Communication: RS232, RS422, RS485 and I2C.
• Analog hardware simulation by SPICE.
• Design for Manufacturing (DFM) process; RF and RADAR theory.
• Operating systems: Windows, Linux, UNIX OS.
• Electronic Lab equipment such as Spectrum and Logic Analyzer, Scope, Signal Generator.
Education
2002 – 2008 Master of Science Diploma in Electro-Optics Engineering
1997 – 2001Bachelor of Science Diploma in Electrical and Electronics Engineering
1991 – 1994College Diploma of Electronics Engineer
